enum ImageRelArm64 [src]

Fields

absolute = 0The relocation is ignored.

addr32 = 1The 32-bit VA of the target.

addr32nb = 2The 32-bit RVA of the target.

branch26 = 3The 26-bit relative displacement to the target, for B and BL instructions.

pagebase_rel21 = 4The page base of the target, for ADRP instruction.

rel21 = 5The 21-bit relative displacement to the target, for instruction ADR.

pageoffset_12a = 6The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) with zero shift.

pageoffset_12l = 7The 12-bit page offset of the target, for instruction LDR (indexed, unsigned immediate).

secrel = 8The 32-bit offset of the target from the beginning of its section. This is used to support debugging information and static thread local storage.

low12a = 9Bit 0:11 of section offset of the target for instructions ADD/ADDS (immediate) with zero shift.

high12a = 10Bit 12:23 of section offset of the target, for instructions ADD/ADDS (immediate) with zero shift.

low12l = 11Bit 0:11 of section offset of the target, for instruction LDR (indexed, unsigned immediate).

token = 12CLR token.

section = 13The 16-bit section index of the section that contains the target. This is used to support debugging information.

addr64 = 14The 64-bit VA of the relocation target.

branch19 = 15The 19-bit offset to the relocation target, for conditional B instruction.

branch14 = 16The 14-bit offset to the relocation target, for instructions TBZ and TBNZ.

rel32 = 17The 32-bit relative address from the byte following the relocation.

Source

  pub const ImageRelArm64 = enum(u16) {
    /// The relocation is ignored.
    absolute = 0,

    /// The 32-bit VA of the target.
    addr32 = 1,

    /// The 32-bit RVA of the target.
    addr32nb = 2,

    /// The 26-bit relative displacement to the target, for B and BL instructions.
    branch26 = 3,

    /// The page base of the target, for ADRP instruction.
    pagebase_rel21 = 4,

    /// The 21-bit relative displacement to the target, for instruction ADR.
    rel21 = 5,

    /// The 12-bit page offset of the target, for instructions ADD/ADDS (immediate) with zero shift.
    pageoffset_12a = 6,

    /// The 12-bit page offset of the target, for instruction LDR (indexed, unsigned immediate).
    pageoffset_12l = 7,

    /// The 32-bit offset of the target from the beginning of its section.
    /// This is used to support debugging information and static thread local storage.
    secrel = 8,

    /// Bit 0:11 of section offset of the target for instructions ADD/ADDS (immediate) with zero shift.
    low12a = 9,

    /// Bit 12:23 of section offset of the target, for instructions ADD/ADDS (immediate) with zero shift.
    high12a = 10,

    /// Bit 0:11 of section offset of the target, for instruction LDR (indexed, unsigned immediate).
    low12l = 11,

    /// CLR token.
    token = 12,

    /// The 16-bit section index of the section that contains the target.
    /// This is used to support debugging information.
    section = 13,

    /// The 64-bit VA of the relocation target.
    addr64 = 14,

    /// The 19-bit offset to the relocation target, for conditional B instruction.
    branch19 = 15,

    /// The 14-bit offset to the relocation target, for instructions TBZ and TBNZ.
    branch14 = 16,

    /// The 32-bit relative address from the byte following the relocation.
    rel32 = 17,

    _,
}  