Source
pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
if (comptime native_arch.isArm() or native_arch.isPowerPC32()) {
// These architectures reorder the arguments so that a register is not skipped to align the
// register number that `offset` is passed in.
const offset_halves = splitValue64(offset);
const length_halves = splitValue64(len);
return syscall6(
.fadvise64_64,
@as(usize, @bitCast(@as(isize, fd))),
advice,
offset_halves[0],
offset_halves[1],
length_halves[0],
length_halves[1],
);
} else if (native_arch.isMIPS32()) {
// MIPS O32 does not deal with the register alignment issue, so pass a dummy value.
const offset_halves = splitValue64(offset);
const length_halves = splitValue64(len);
return syscall7(
.fadvise64,
@as(usize, @bitCast(@as(isize, fd))),
0,
offset_halves[0],
offset_halves[1],
length_halves[0],
length_halves[1],
advice,
);
} else if (comptime usize_bits < 64) {
// Other 32-bit architectures do not require register alignment.
const offset_halves = splitValue64(offset);
const length_halves = splitValue64(len);
return syscall6(
switch (builtin.abi) {
.gnuabin32, .gnux32, .muslabin32, .muslx32 => .fadvise64,
else => .fadvise64_64,
},
@as(usize, @bitCast(@as(isize, fd))),
offset_halves[0],
offset_halves[1],
length_halves[0],
length_halves[1],
advice,
);
} else {
// On 64-bit architectures, fadvise64_64 and fadvise64 are the same. Generally, older ports
// call it fadvise64 (x86, PowerPC, etc), while newer ports call it fadvise64_64 (RISC-V,
// LoongArch, etc). SPARC is the odd one out because it has both.
return syscall4(
if (@hasField(SYS, "fadvise64_64")) .fadvise64_64 else .fadvise64,
@as(usize, @bitCast(@as(isize, fd))),
@as(usize, @bitCast(offset)),
@as(usize, @bitCast(len)),
advice,
);
}
}